It is standard practice in the manufacture of many semiconductor devices, and other devices, to provide a thin passive layer or coating of a chemically nonreactive or low reactivity material to protect the semiconductor junctions and layers from degradation by contact with oxygen, fumes in the air, moisture, etc., and from damage by contact during packaging and handling and to stabilize the electrical characteristics of the device.
The production of silicon oxide coatings and their application to semiconductor devices and to other devices is well known, and there is considerable literature on the subject. The general principles underlying the formation of thin films are described in HANDBOOK OF THIN FILM TECHNOLOGY, Maissell, Leon I. and Glang, Reinhard, editors, McGraw Hill Book Company, New York, 1970, and the general technology for processing silicon-based semiconductor devices is described in SILICON PROCESSING FOR THE VLSI ERA, Wolf, Stanley, and Talbert, Richard N., editors, Lattice Press, Sunset Beach, Calif., 1986, which includes a discussion of thin film technology.
The low pressure chemical vapor deposition (LPCVD) process which will be discussed herein and which is of principle interest in this invention involves the deposition of films from gaseous reagents in the pressure range of from about 100 mtorr to about 1000 mtorr in most instances, with operation being possible up to about 2000 mtorr in some particular examples, the latter pressure being intermediate APCVD and LPCVD operation.
A large variety of "thin films" are used in the fabrication of Very Large Scale Integration (VLSI) devices. These films may be thermally grown or deposited from the vapor phase. They can be metals, semiconductors, or insulators.
Thin films for use in VLSI fabrication must satisfy a large set of rigorous chemical, structural and electrical requirements. Film composition and thickness must be strictly controlled to facilitate etching of submicron features. Very low densities of both particulate defects and film imperfections, such as pinholes, become critical for the small line widths, high densities, and large areas necessary for VLSI. The small geometries also create highly rugged topography for overlying films to cover. Therefore, excellent adhesion, low stress, and conformal step coverage are required of a VLSI thin film, and its own surface topography should reduce or even planarize the underlying steps, if possible. Finally, non-conducting thin films must have low dielectric constants to reduce parasitic capacitances exacerbated by the scaled-down film thicknesses.
Chemical Vapor Deposition (CVD) process can be summarized as consisting of the following sequence of steps: (a) a given composition and flow rate of reactant gases and diluent inert gases is introduced into a reaction chamber; (b) the gas species move to the substrate; (c) the reactants are adsorbed on the substrate; (d) the adatoms undergo migration and film-forming chemical reactions, and (e) the gaseous by-products of the reaction are desorbed and removed from the reaction chamber. Energy to drive the reactions can be supplied by several methods; e.g., thermal, photons, or electrons, with thermal energy being the most commonly used.
In practice, the chemical reactions of the reactant gases leading to the formation of a solid material may take place not only on or very close to the wafer surface, a heterogeneous reaction, but also in the gas phase, a homogeneous reaction. Heterogeneous reactions are much more desirable, as such reactions occur selectively only on heated surfaces, and produce good quality films. Homogeneous reactions, on the other hand, are undesirable, as they form gas phase clusters of the depositing material, which can result in poorly adhering, low density films, or defects in the depositing film. In addition, such reactions also consume reactants and can cause decreases In deposition rates. Thus, one important characteristic of a chemical reaction for CVD application is the degree to which heterogeneous reactions are favored over gas phase reactions.
Since the aforementioned steps of a CVD process are sequential, the one which occurs at the slowest rate will determine the rate of deposition. The steps can be grouped into (1) gas-phase processes, and (2) surface processes. The gas phase phenomenon of interest is the rate at which gases impinge on the substrate. This is modeled by the rate at which gases cross the boundary layer that separates the bulk regions of flowing gas and substrate surface. Such transport processes occur by gas-phase diffusion, which is proportional to the diffusivity of the gas, D, and concentration gradient across the boundary layer. The rate of mass transport is only relatively weakly influenced by temperature.
Several surface processes can be important once the gases arrive at the hot substrate surface, but the surface reaction, in general, can be modeled by a thermally activated phenomenon which proceeds at a rate which is a function of the frequency factor, the activation energy, and the temperature. The surface reaction rate increases with increasing temperature. For a given surface reaction, the temperature may rise high enough so that the reaction rate exceeds the rate at which reactant species arrive at the surface. In such cases, the reaction cannot proceed any more rapidly than the rate at which reactant gases are supplied to the substrate by mass transport, no matter how high the temperature is increased. This situation is referred to as a mass-transport limited deposition process.
On the other hand, at lower temperatures, the surface reaction rate is reduced, and eventually the arrival rate of reactants exceeds the rate at which they are consumed by the surface reaction process. Under such conditions the deposition rate is reaction rate limited. Thus, at high temperatures, the deposition is usually mass-transport limited, while at lower temperatures it is surface-reaction rate-limited. In actual processes, the temperature at which the deposition condition moves from one of these growth regimes to the other is dependent on the activation energy of the reaction, and the gas flow conditions in the reactor. Thus, it is impossible to extrapolate with any certainty or accuracy data or process conditions or results from one pressure regime or temperature regime to another.
In processes that are run under reaction rate-limited conditions, the temperature of the process is an important parameter. That is, uniform deposition rates throughout a reactor require conditions that maintain a constant reaction rate. This, in turn, implies that a constant temperature must also exist everywhere at all wafer surfaces. On the other hand, under such conditions, the rate at which reactant species arrive at the surface is not as important, since their concentration does not limit the growth rate. Thus, it is not as critical that a reactor be designed to supply an equal flux of reactants to all locations of a wafer surface. It will be seen that in low-pressure CVD (LPCVD) reactors, wafers can be stacked vertically and at very close spacing because such systems operate in a reaction rate limited mode. The reason for this is as follows:
Under the low pressure of an LPCVD reactor .about.1 torr the diffusivity of the gas species is increased by a factor of 1000 over that at atmospheric pressure, and this is only partially offset by the fact that the boundary layer, the distance across which the reactants must diffuse, increases by less than the square root of the pressure. The net effect is that there is more than an order of magnitude increase in the transport of reactants to and by-products away from the substrate surface, and the rate-limiting step is thus the surface reaction.
CVD systems usually contain the following components: (a) gas sources; (b) gas feed lines; (c) mass-flow controllers for metering the gases into the system; (d) a reaction chamber or reactor; (e) a method for heating the wafers onto which the film is to be deposited, and in some types of systems, for adding additional energy by other means; and (f) temperature sensors.
LPCVD reactors are designed in two primary configurations: (a) horizontal tube reactors; and (b) vertical flow isothermal reactors.
Horizontal tube, hot wall reactors are the most widely used LPCVD reactors in VLSI processing. They are employed for depositing poly-Si, silicon nitride, and undoped and doped SiO.sub.2 films. They find such broad applicability primarily because of their superior economy, throughput, uniformity, and ability to accommodate large diameter, e.g. 150 mm wafer. Their main disadvantages are susceptibility to particulate contamination and low deposition rates.
The vertical flow isothermal LPCVD reactor further extends the distributed gas feed technique, so that each wafer receives an identical supply of fresh reactants. Wafers are again stacked side by side, but are placed in perforated-quartz cages. The cages are positioned beneath long, perforated, quartz reaction-gas injector tubes, one tube for each reactant gas. Gas flows vertically from the injector tubes through the cage perforations, past the wafers, parallel to the wafer surface and into exhaust slots below the cage. The size, number, and location of cage perforations are used to control the flow of reactant gases to the wafer surfaces. By properly optimizing cage perforation design, each wafer can be supplied with identical quantities of fresh reactants from the vertically adjacent injector tubes. Thus, this design can avoid the wafer-to-wafer reactant depletion effects of the end-feed tube reactors. requires no temperature ramping, produces highly uniform depositions, and reportedly achieves low particulate contamination.
Chemical vapor deposition (CVD) SiO.sub.2 films, and their binary and ternary silicates, find wide use in VLSI processing. These materials are used as insulation between polysilicon and metal layers, between metal layers in multilevel metal systems, as getters, as diffusion sources, as diffusion and implantation masks, as capping layers to prevent outdiffusion, and as final passivation layers. In general, the deposited oxide films must exhibit uniform thickness and composition, low particulate and chemical contamination, good adhesion to the substrate, low stress to prevent cracking, good integrity for high dielectric breakdown, conformal step coverage for multilayer systems, low pinhole density, and high throughout for manufacturing.
CVD silicon dioxide is an amorphous structure of SiO.sub.4 tetrahedra with an empirical formula SiO.sub.2. Depending on the deposition conditions, as summarized in Table 2, CVD silicon dioxide may have lower density and slightly different stoichiometry from thermal silicon dioxide, causing changes in mechanical and electrical film properties, such as index of refraction, etch rate, stress, dielectric constant and high electric-field breakdown strength. Deposition at high temperatures, or use of a separate high temperature post-deposition anneal step, referred to as densification can made the properties of CVD films approach those of the thermal oxide.
The low temperature deposition of SiO.sub.2 utilizes a reaction of silane and oxygen to form undoped SiO.sub.2 films. The depositions are carried out in APCVD reactors, primarily of the continuous belt type, in distributed feed LPCVD reactors, or in PECVD reactors. The depletion effect precludes the use of conventional LPCVD for the SiH.sub.4 +O.sub.2 reaction. The addition of PH.sub.3 to the gas flow forms P.sub.2 O.sub.5, which is incorporated into the SiO.sub.2 film to produce a phosphosilicate glass (PSG). The reactions are given by: EQU SiH.sub.4 +O.sub.2 .fwdarw.SiO.sub.2 +2H.sub.2 EQU 4PH.sub.3 +50.sub.2 .fwdarw.2P.sub.2 O.sub.5 +6H.sub.2
The reaction between silane and excess oxygen forms SiO.sub.2 by heterogeneous surface reaction. Homogeneous gas-phase nucleation also occurs, leading to small SiO.sub.2 particles that form a white powder on the reaction chamber walls, and which may potentially cause particulate contamination in the deposited films.
The deposition rate increases slowly with increased temperature between 310.degree. and 450.degree. C. An apparent activation energy of less than 0.4 eV has been measured which is indicative of a surface adsorption or gas phase diffusion deposition process. The deposition rate can be increased at constant temperature, up to a limit by increasing the O.sub.2 :SiH.sub.4 ratio. Continued increase in the ratio eventually results in a decrease in deposition rate, as a result of O.sub.2 being adsorbed on the substrate, thus inhibiting the SiH.sub.4 decomposition.
Silicon dioxide films deposited at low temperatures exhibit lower densities than thermal SiO.sub.2, and have an index of refraction of .about.1.44. They also exhibit substantially higher etch rates in buffered hydrofluoric acid than thermal SiO.sub.2. Subsequent heating of such films to temperatures between 700.degree.-1,000.degree. C. causes densification. That is, this step causes the density of the material to increase from 2.1 g/cm.sup.3 to 2.2 g/cm.sup.3 the film thickness to decrease, and the etch rate in HF to decrease temperature and rate. Dielectric strengths of 4-8.times.10.sup.6 V/cm, and dielectric constants ranging from 4-5 have been obtained. Low pinhole counts have been obtained with PECVD oxides, as have very conformal coatings. Adhesion to metal is also reported to be excellent.
In the medium temperature range, SiO.sub.2 is deposited in LPCVD reactors by decomposing tetraethoxysilane, Si(OC.sub.2 H.sub.5).sub.4, also known as tetraethyl orthosilicate, or TEOS. The deposition rate for TEOS shows an exponential increase with temperature in the range of 650.degree.-800.degree. C. with an apparent activation energy of 1.9 eV. This pronounced temperature dependence can lead to thickness control problems. The deposition rate is also dependent on the TEOS partial pressure. It is linearly dependent at low partial pressures, and tends to level off as the adsorbed TEOS saturates the surface. TEOS films generally show excellent conformality.
At high temperatures, near 900.degree. C., SiO.sub.2 is formed by an LPCVD process in which dichlorosilane and nitrous oxide are reacted. The reaction is given by: EQU SiH.sub.2 CL.sub.2 +2N.sub.2 O.fwdarw.SiO.sub.2 +2N.sub.2 +2HCl.
Such depositions produce films having excellent uniformity, and with properties close to those of thermal SiO.sub.2. High temperature LPCVD is sometimes used to deposit SiO.sub.2 over poly-Si.
Low temperature depositions of SiO.sub.2 films using various silicon precursors is summarized in Table I. As is indicated only diethylsilane and silane have been shown to deposit at temperatures below 400.degree. C. upon reaction with oxygen. In practice, LPCVD reaction temperatures exceeding 400.degree. C. are required to achieve practical rates of film deposition with both of these sources.
TABLE I ______________________________________ Precursors for LPCVD SiO.sub.2 Film Depositions Chemical Temp. Ref. ______________________________________ Diethylsilane &gt;325.degree. C. J. Electrochem Soc. 136, 1843 (198) AK Hochberg DL, O'Meara 2,4,6,8 Tetramethylcyclo- &gt;550.degree. C. Electrochem. Soc. Ext. tetrasiloxane (TMCTS) Abstract No. 239, 88-2, 335 (1988) AK Hochberg, et al. Diacetoxyditertiary- &gt;400.degree. C. G. Smolinsky & butoxysilane (DADBS) R. E. Dean Mater, Lett. 4, 256 (1986) Silane &gt;350.degree. C. J. L. Vossen and W. Kern eds. Thin Film Processes Academic 1978 ______________________________________